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Week 4

318 words·2 mins
calas learning_log
Connie
Author
Connie
Optimistic undergrad
Table of Contents

Week 4 Learning Log (June 9–13, 2025)
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1. Objectives
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  • Literature Review & Blogging

    • Complete Chapter 1 article on Patterson & Hennessy

    • Read Chapters 1, 2, and 4 from Harris & Harris (2022)

  • Website Development

    • Implement table styling and internal linking on Hugo site

    • Redesign homepage and publish backlog articles

  • Professional Skill Building

    • Attend TA training session

    • Learn TCL scripting for tool automation

  • IP Catalog Planning

    • Draft initial plan for a Verilog library of basic modules (RVSvKit MVP)

2. Daily Activities
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📅 Monday, June 9
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  • Literature & Blog Writing

    • Finished drafting the Chapter 1 article on Patterson & Hennessy

    • Read key sections from Harris & Harris (2022)

  • Website Development

    • Enhanced Hugo table styling for better readability

    • Added internal links between existing blog posts

📅 Tuesday, June 10
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  • Homepage Redesign

    • Remade the site’s homepage layout to match new style guidelines

    • Published archived articles to fill content gaps

📅 Wednesday, June 11
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  • TA Training Session

    • Attended lab assistant training

  • TCL Scripting

    • Learned basic TCL commands for automating Vivado/ModelSim tasks

  • RVSvKit Planning

    • Sketched module inventory for the Verilog IP library: identified half_adder, adder, register, control FSM, and pipeline primitives as first targets

📅 Thursday, June 12
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  • Health & Rest

    • Took sick leave

📅 Friday, June 13
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  • Health & Rest

    • Continued recovery on sick leave

3. Key Learnings
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  • Computer Architecture Foundations
    Consolidated core concepts from Patterson & Hennessy and Harris & Harris, laying groundwork for blog series.

  • Site Usability Improvements
    Mastered Hugo’s styling and linking features, significantly improving content navigation.

  • Lab Operations Insight
    Gained clarity on TA responsibilities and lab setup through hands-on training.

  • Automation Skills
    Acquired essential TCL scripting skills to streamline FPGA toolchains in future CI workflows.

  • IP Catalog Roadmap
    Established the MVP module list for RVSvKit, defining clear extension points for pipeline and arithmetic primitives.

  • Work–Life Balance
    Recognized the importance of rest and recovery during periods of illness, ensuring sustainable progress.