Parallelism, concurrency in OS and Hardware
flowchart TD subgraph Hardware PROC[Processors] --> CORE[Cores per Processor] --> SMT[Hardware Threads] SMT --> ILP[Instruction-Level Parallelism /pipeline, superscalar/] end subgraph OS_Abstractions PROG[Program] --> MP PROG --> MT MP[Multiprogramming] --> PROCOS[Processes] --> THR[Threads] MT[Multitasking] --> PROCOS THR --> TLP[Thread-Level Parallelism] end PROCOS -. scheduled on .-> SMT THR -. scheduled on .-> SMT TLP -. mapped across .-> SMT
Hardware side:
A machine may have multiple processors, each with multiple cores.
Each core can support multiple hardware threads (SMT, hyperthreading).
Inside a core, instruction-level parallelism (ILP) executes several instructions at once via pipelining or superscalar issue.
OS side:
Multiprogramming: many processes are kept in memory. When one blocks on I/O, another is scheduled, ensuring the CPU is not idle.
Multitasking (time-sharing): CPU time is sliced among processes, with rapid context switching to give the illusion of simultaneous execution.
Each process can contain multiple threads, which are lighter units of execution.
Thread-Level Parallelism (TLP): threads from the same process or from different processes can run concurrently, exploiting available cores and hardware threads.
Link between them:
The OS scheduler maps both processes and threads onto hardware threads (SMT slots) across cores.
Multiprogramming ensures long-term CPU utilization, multitasking ensures short-term responsiveness, and TLP boosts throughput by running many threads in parallel.
Hardware provides the substrate: processors, cores, hardware threads, and ILP inside each core.