Control signals

	Signal	Width	Description	Used By
1	RegWrite	1 bit	Write enable for register file	RegFile
2	MemRead	1 bit	Enable memory read	Data Memory
3	MemWrite	1 bit	Enable memory write	Data Memory
4	MemtoReg	1 bit	Select memory data or ALU result to RegFile	Write-back Mux
5	ALUSrc	1 bit	Select immediate or register as ALU input	ALU input Mux
6	PCSrc	1 bit	Select next PC (sequential or branch)	PC input Mux
7	Branch	1 bit	Indicates branch instruction	Branch Comparator, PC logic
8	Jump	1 bit	Indicates jump instruction	PC logic
9	ALUOp	2-3 bits	Encodes ALU operation type	ALU Control
10	(Optional) ImmSrc	2-3 bits	Select immediate extraction	Immediate Generator
11	(Optional) LoadType	2 bits	Select load size	Data Memory or extension logic
12	(Optional) StoreType	2 bits	Select store size	Data Memory

Before diving into the tables, note that some control signals are not simple single bits but multi‑bit buses that let your datapath select among multiple options:

ImmSrc [2:0]: selects which immediate format your imm_gen.v uses:
- 3'b000 = I‑type
- 3'b001 = S‑type
- 3'b010 = B‑type
- 3'b011 = U‑type
- 3'b100 = J‑type
LoadType [2:0]: tells data_mem.v the width and signedness of a load:
- 3'b000 = Byte, Signed
- 3'b001 = Half, Signed
- 3'b010 = Word (no sign extension)
- 3'b011 = Byte, Unsigned
- 3'b100 = Half, Unsigned
StoreType [1:0]: tells data_mem.v the width of a store:
- 2'b00 = Byte
- 2'b01 = Half
- 2'b10 = Word

PCSrc is high whenever the next‐PC comes from a target adder (branches or jumps):
$PCSrc=Branch \lor Jump$

ImmSrc selects which immediate‐generation format to use:

> I : I‐type (loads, ALU‐imm, JALR)
> S : S‐type (stores)
> B : B‐type (branches)
> U : U‐type (LUI/AUIPC)
> J : J‐type (JAL)

LoadType / StoreType encode access width & signedness.

R-Type ALU Ops (opcode = 0110011; ALUSrc=0; ALUOp=10; ImmSrc=–)

Instr	opcode	funct3	funct7	RegWrite	ALUOp	ImmSrc	LoadType	StoreType
ADD	0110011	000	0000000	1	10	–	–	–
SUB	0110011	000	0100000	1	10	–	–	–
SLL	0110011	001	0000000	1	10	–	–	–
SLT	0110011	010	0000000	1	10	–	–	–
SLTU	0110011	011	0000000	1	10	–	–	–
XOR	0110011	100	0000000	1	10	–	–	–
SRL	0110011	101	0000000	1	10	–	–	–
SRA	0110011	101	0100000	1	10	–	–	–
OR	0110011	110	0000000	1	10	–	–	–
AND	0110011	111	0000000	1	10	–	–	–

I-Type ALU Ops (opcode = 0010011; ALUSrc=1; ALUOp=10; ImmSrc=I)

Instr	opcode	funct3	funct7	RegWrite	ALUSrc	ALUOp	ImmSrc	LoadType	StoreType
ADDI	0010011	000	–	1	1	10	I	–	–
SLLI	0010011	001	0000000	1	1	10	I	–	–
SLTI	0010011	010	–	1	1	10	I	–	–
SLTIU	0010011	011	–	1	1	10	I	–	–
XORI	0010011	100	–	1	1	10	I	–	–
SRLI	0010011	101	0000000	1	1	10	I	–	–
SRAI	0010011	101	0100000	1	1	10	I	–	–
ORI	0010011	110	–	1	1	10	I	–	–
ANDI	0010011	111	–	1	1	10	I	–	–

Loads (opcode = 0000011; ALUSrc=1; ALUOp=00; MemRead=1; MemtoReg=1; ImmSrc=I)

Instr	opcode	funct3	funct7	RegWrite	ALUSrc	MemRead	MemtoReg	ImmSrc	LoadType	StoreType
LB	0000011	000	–	1	1	1	1	I	Byte_Signed	–
LH	0000011	001	–	1	1	1	1	I	Half_Signed	–
LW	0000011	010	–	1	1	1	1	I	Word	–
LBU	0000011	100	–	1	1	1	1	I	Byte_Unsigned	–
LHU	0000011	101	–	1	1	1	1	I	Half_Unsigned	–

Stores (opcode = 0100011; ALUSrc=1; ALUOp=00; MemWrite=1; ImmSrc=S)

Instr	opcode	funct3	funct7	ALUSrc	MemWrite	MemtoReg	ImmSrc	LoadType	StoreType
SB	0100011	000	–	1	1	–	S	–	Byte
SH	0100011	001	–	1	1	–	S	–	Half
SW	0100011	010	–	1	1	–	S	–	Word

Branches (opcode = 1100011; ALUSrc=0; ALUOp=01; Branch=1; ImmSrc=B)

Instr	opcode	funct3	funct7	MemtoReg	PCSrc	Branch	ALUOp	ImmSrc	LoadType	StoreType
BEQ	1100011	000	–	–	1	1	01	B	–	–
BNE	1100011	001	–	–	1	1	01	B	–	–
BLT	1100011	100	–	–	1	1	01	B	–	–
BGE	1100011	101	–	–	1	1	01	B	–	–
BLTU	1100011	110	–	–	1	1	01	B	–	–
BGEU	1100011	111	–	–	1	1	01	B	–	–

Jumps (opcode = 1101111 & 1100111; ImmSrc=J for JAL, I for JALR)

Instr	opcode	funct3	funct7	RegWrite	ALUSrc	MemRead	MemWrite	MemtoReg	PCSrc	Branch	Jump	ALUOp	ImmSrc	LoadType	StoreType
JAL	1101111	–	–	1	1	0	0	0	1	0	1	00	J	–	–
JALR	1100111	000	–	1	1	0	0	0	1	0	1	00	I	–	–

U-Type (opcode = 0110111 & 0010111; ALUSrc=1; ImmSrc=U)

Instr	opcode	funct3	funct7	RegWrite	ALUSrc	MemRead	MemWrite	MemtoReg	PCSrc	Branch	Jump	ALUOp	ImmSrc	LoadType	StoreType
LUI	0110111	–	–	1	1	0	0	0	0	0	0	11	U	–	–
AUIPC	0010111	–	–	1	1	0	0	0	0	0	0	00	U	–	–

See more: ALU Control

ALU Control Data Memory